woset-workshop

Workshop on Open-Source EDA Technology (WOSET)

WOSET 2024 Schedule

November 18, 2024

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The full proceedings are here.

Welcome

Time (PST) Duration (Minutes) Title Presenter(s)
8:00 AM 10 Welcome Remarks Matthew Guthaus, UC Santa Cruz

Session 1

Moderator: Tyler Sheaves, UC Santa Cruz

Time (PST) Duration (Minutes) Title Presenter(s)
8:10 AM 20 Scaling Program Synthesis Based Technology Mapping with Equality Saturation Gus Smith
8:30 AM 20 Hardware and software build flow with SoCMake Risto Pejašinović
8:50 AM 20 pyngspice: A High-performance Python Binding for Ngspice Jihyeon Park

Keynote

Time (PST) Duration (Minutes) Title Presenter(s)
9:10 AM 30 From Consumer to Contributor: Open Source Communities and Why They Matter Megan Knight, Arm

Work in Progress Break-out Sessions

Time (PST) Duration (Minutes) Title Presenter(s)
9:40 AM 50 The Educational RISC-V Microprocessor Wildcat Martin Schoeberl
9:40 AM 50 YoYoLint – a custom SystemVerilog RTL linter for Yosys Deepa Palaniappan
9:40 AM 50 eSim: An Open-Source EDA Tool for Education Varad Vilasrao Patil
9:40 AM 50 Status overview of the IHP OpenPDK Initiative: Technology - Devices - IC Designs Wladek Grabinski
9:40 AM 50 Lighter: An Open-Source Automatic Clock Gating tool for Dynamic Power Reduction in ASIC Youssef Ashraf Kandil

Session 2

Moderator: Bhawandeep Singh Harsh, UC Santa Cruz

Time (PST) Duration (Minutes) Title Presenter(s)
10:30 AM 20 ORAssistant: A Custom RAG-based Conversational Assistant for OpenROAD Aviral Kaintura, Palaniappan R.
10:50 AM 20 OpenLane 2: Making the Most Popular Open Source ASIC Flow Modular Mohamed Gaber
11:10 AM 20 Simulating a Million-Core System with Switchboard Andreas Olofsson

Invited Talk

Time (PST) Duration (Minutes) Title Presenter(s)
11:30 AM 20 OpenROAD Update Matt Liberty, Precision Innovations

Session 3

Moderator: Haoyuan Wang, UC Santa Cruz

Time (PST) Duration (Minutes) Title Presenter(s)
11:50 AM 20 A Fast, Accurate, and Open-Source Simulation Tool for High-Level Synthesis Rishov Sarkar
12:10 PM 20 Integrating Asynchronous Circuits into the Caravel Testing Harness Thomas Jagielski
12:30 PM 20 An RFIC-oriented flow for Planar Inductors modeling and generation aiming Open-Sour Hugo Dias Gilo

Closing

Time (PST) Duration (Minutes) Title Presenter(s)
12:50 AM 5 Closing Remarks Matthew Guthaus, UC Santa Cruz